pn211214080534 #Start recording tcl command: 12/14/2021 08:04:40 #Project Location: D:/Stefan Bischoff/Zittau/Vorlesungen/Vorlesung Digitaltechnik/Bischoff Software/HDL/FPGA MACHX03/BCD-HEX; Project name: BCDHEX prj_project open "D:/Stefan Bischoff/Zittau/Vorlesungen/Vorlesung Digitaltechnik/Bischoff Software/HDL/FPGA MACHX03/BCD-HEX/BCDHEX.ldf" #Stop recording: 12/14/2021 08:05:34 pn211214100224 #Start recording tcl command: 12/14/2021 09:23:45 #Project Location: D:/Stefan Bischoff/Zittau/Vorlesungen/Vorlesung Digitaltechnik/Bischoff Software/HDL/FPGA MACHX03/BCD-HEX; Project name: BCDHEX prj_project open "D:/Stefan Bischoff/Zittau/Vorlesungen/Vorlesung Digitaltechnik/Bischoff Software/HDL/FPGA MACHX03/BCD-HEX/BCDHEX.ldf" #Stop recording: 12/14/2021 10:02:24 pn220118124940 #Start recording tcl command: 1/18/2022 12:48:33 #Project Location: D:/Stefan Bischoff/Zittau/Vorlesungen/Vorlesung Digitaltechnik/Bischoff Software/HDL/FPGA MACHX03/BCD-HEX; Project name: BCDHEX prj_project open "D:/Stefan Bischoff/Zittau/Vorlesungen/Vorlesung Digitaltechnik/Bischoff Software/HDL/FPGA MACHX03/BCD-HEX/BCDHEX.ldf" #Stop recording: 1/18/2022 12:49:40 pn220414085132 #Start recording tcl command: 4/14/2022 08:50:27 #Project Location: D:/Stefan Bischoff/Zittau/Vorlesungen/Vorlesung Digitaltechnik/Bischoff Software/HDL/FPGA MACHX03/BCD-HEX; Project name: BCDHEX prj_project open "D:/Stefan Bischoff/Zittau/Vorlesungen/Vorlesung Digitaltechnik/Bischoff Software/HDL/FPGA MACHX03/BCD-HEX/BCDHEX.ldf" #Stop recording: 4/14/2022 08:51:32 pn220511093406 #Start recording tcl command: 5/11/2022 09:33:59 #Project Location: D:/Stefan Bischoff/Zittau/Vorlesungen/Vorlesung Digitaltechnik/Bischoff Software/HDL/FPGA MACHX03/BCD-7 Segment; Project name: BCDHEX prj_project open "D:/Stefan Bischoff/Zittau/Vorlesungen/Vorlesung Digitaltechnik/Bischoff Software/HDL/FPGA MACHX03/BCD-7 Segment/BCDHEX.ldf" #Stop recording: 5/11/2022 09:34:06 pn220609172134 #Start recording tcl command: 6/9/2022 17:20:34 #Project Location: D:/Stefan Bischoff/Zittau/Vorlesungen/Vorlesung Digitaltechnik/Bischoff Software/HDL/FPGA MACHX03/BCD-7 Segment; Project name: BCDHEX prj_project open "D:/Stefan Bischoff/Zittau/Vorlesungen/Vorlesung Digitaltechnik/Bischoff Software/HDL/FPGA MACHX03/BCD-7 Segment/BCDHEX.ldf" #Stop recording: 6/9/2022 17:21:34 pn220614103203 #Start recording tcl command: 6/14/2022 10:06:03 #Project Location: D:/Stefan Bischoff/Zittau/Vorlesungen/Vorlesung Digitaltechnik/Bischoff Software/HDL/FPGA MACHX03/BCD-7 Segment; Project name: BCDHEX prj_project open "D:/Stefan Bischoff/Zittau/Vorlesungen/Vorlesung Digitaltechnik/Bischoff Software/HDL/FPGA MACHX03/BCD-7 Segment/BCDHEX.ldf" #Stop recording: 6/14/2022 10:32:03 pn220614103300 #Start recording tcl command: 6/14/2022 10:32:07 #Project Location: D:/Stefan Bischoff/Zittau/Vorlesungen/Vorlesung Digitaltechnik/Bischoff Software/HDL/FPGA MACHX03/BCD-7 Segment; Project name: BCDHEX prj_project open "D:/Stefan Bischoff/Zittau/Vorlesungen/Vorlesung Digitaltechnik/Bischoff Software/HDL/FPGA MACHX03/BCD-7 Segment/BCDHEX.ldf" #Stop recording: 6/14/2022 10:33:00 pn230615120247 #Start recording tcl command: 6/15/2023 12:01:57 #Project Location: D:/Stefan Bischoff/Zittau/Vorlesungen/Vorlesung Digitaltechnik/Bischoff Software/HDL/FPGA MACHX03/BCD-7 Segment; Project name: BCDHEX prj_project open "D:/Stefan Bischoff/Zittau/Vorlesungen/Vorlesung Digitaltechnik/Bischoff Software/HDL/FPGA MACHX03/BCD-7 Segment/BCDHEX.ldf" prj_project close #Stop recording: 6/15/2023 12:02:47 pn230615153203 #Start recording tcl command: 6/15/2023 15:28:54 #Project Location: D:/Stefan Bischoff/Zittau/Vorlesungen/Vorlesung Digitaltechnik/Bischoff Software/HDL/FPGA MACHX03/BCD-7 Segment; Project name: BCDHEX prj_project open "D:/Stefan Bischoff/Zittau/Vorlesungen/Vorlesung Digitaltechnik/Bischoff Software/HDL/FPGA MACHX03/BCD-7 Segment/BCDHEX.ldf" #Stop recording: 6/15/2023 15:32:03